395 research outputs found
Localization algebras and deformations of Koszul algebras
We show that the center of a flat graded deformation of a standard Koszul
algebra behaves in many ways like the torus-equivariant cohomology ring of an
algebraic variety with finite fixed-point set. In particular, the center acts
by characters on the deformed standard modules, providing a "localization map."
We construct a universal graded deformation, and show that the spectrum of its
center is supported on a certain arrangement of hyperplanes which is orthogonal
to the arrangement coming the Koszul dual algebra. This is an algebraic version
of a duality discovered by Goresky and MacPherson between the equivariant
cohomology rings of partial flag varieties and Springer fibers; we recover and
generalize their result by showing that the center of the universal deformation
for the ring governing a block of parabolic category for
is isomorphic to the equivariant cohomology of a Spaltenstein
variety. We also identify the center of the deformed version of the "category
" of a hyperplane arrangement (defined by the authors in a
previous paper) with the equivariant cohomology of a hypertoric variety.Comment: 39 pages; v3: final versio
Heavy Ion Test Report for the AD9364 RF Transceiver
The purpose of this test is to determine the heavy ion-induced single-event effect (SEE) susceptibility of the AD9364 from Analog Devices
RH1021BMH-10 Precision 10 V Reference Total Ionizing Dose Test Report
The purpose of this test was to validate the Analog Devices (ADI) RH1021BMH-10 flight lot for use in the fabrication of Europa Clipper Propulsion subsystem flight hardware. This test shall serve as the radiation lot acceptance test (RLAT) for this flight lot with wafer lot number 769658.1 and lot date code (LDC) 1430A. Low dose rate (LDR) irradiations were performed in this test so that the device susceptibility to enhanced low dose rate sensitivity (ELDRS) could be determined
Heavy Ion Test Report for the LTC6268-10 Operational Amplifier
The purpose of this test is to determine the heavy ion-induced single-event effect (SEE) susceptibility of the LTC6268-10 from Linear Technology Corp
Single Event Effect Testing of the Micron MT46V128M8
The Micron MT46V128M8 was tested for single event effects (SEE) at the Texas AM University Cyclotron Facility (TAMU) in June of 2017. Testing revealed a sensitivity to device hang-ups classified as single event functional interrupts (SEFI) and possible soft data errors classified as single event upsets (SEU)
Single Event Transients in Voltage Regulators for FPGA Power Supply Applications
As with other bipolar analog devices, voltage regulators are known to be sensitive to single event transients (SET). In typical applications, large output capacitors are used to provide noise immunity. Therefore, since SET amplitude and duration are generally small, they are often of secondary importance due to this capacitance filtering. In low voltage applications, however, even small SET are a concern. Over-voltages may cause destructive conditions. Under-voltages may cause functional interrupts and may also trigger electrical latchup conditions. In addition, internal protection circuits which are affected by load as well as internal thermal effects can also be triggered from heavy ions, causing dropouts or shutdown ranging from milliseconds to seconds. In the case of FPGA power supplies applications, SETS are critical. For example, in the case of Actel FPGA RTAX family, core power supply voltage is 1.5V. Manufacturer specifies an absolute maximum rating of 1.6V and recommended operating conditions between 1.425V and 1.575V. Therefore, according to the manufacturer, any transient of amplitude greater than 75 mV can disrupt normal circuit functions, and overvoltages greater than 100 mV may damage the FPGA. We tested five low dropout voltage regulators for SET sensitivity under a large range of circuit application conditions
Xilinx Kintex-UltraScale Field Programmable Gate Array Single Event Effects (SEE) Heavy-Ion Test Report
This is an independent investigation that evaluates the single event destructive and transient susceptibility of the Xilinx Kintex-UltraScale device. Design/Device susceptibility is determined by monitoring the device under test (DUT) for Single Event Transient (SET) and Single Event Upset (SEU) induced faults by exposing the DUT to a heavy ion beam. Potential Single Event Latch-up (SEL) is monitored throughout heavy-ion testing by examining device current. This device does not have embedded mitigation. Hence, user implemented mitigation is investigated using Synopsys mitigation tools
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